Details
Robustness and Usability in Modern Design Flows
96,29 € |
|
Verlag: | Springer |
Format: | |
Veröffentl.: | 08.01.2008 |
ISBN/EAN: | 9781402065361 |
Sprache: | englisch |
Anzahl Seiten: | 166 |
Dieses eBook enthält ein Wasserzeichen.
Beschreibungen
The size of technically producible integrated circuits increases continuously. But the ability to design and verify these circuits does not keep up with this development. Therefore, today’s design ?ow has to be improved to achieve a higher productivity. In this book the current design methodology and ver- cation methodology are analyzed, a number of de?ciencies are identi?ed, and solutions are suggested. Improvements in the methodology as well as in the underlying algorithms are proposed. An in-depth presentation of preliminary concepts makes the book self-contained. Based on this foundation major - sign problems are targeted. In particular, a complete tool ?ow for Synthesis for Testability of SystemC descriptions is presented. The resulting circuits are completely testable and test pattern generation in polynomial time is possible. Veri?cation issues are covered in even more detail. A whole new paradigm for formal design veri?cation is suggested. This is based upon design und- standing, the automatic generation of properties, and powerful tool support for debugging failures. All these new techniques are empirically evaluated and - perimental results are provided. As a result, an enhanced design ?ow is created that provides more automation (i.e. better usability) and reduces the probability of introducing conceptual errors (i.e. higher robustness). Acknowledgments We would like to thank all members of the research group for computer arc- tecture in Bremen for the helpful discussions and the great atmosphere during work and research.
Dedication. List of Figures. List of Tables. Preface. 1. Introduction. 2. Preliminaries. 3. Algorithms and Data Structures. 4. Synthesis. 5. Property Generation. 6. Diagnosis. 7. Summary and Conclusions. References. Index of Symbols. Index.
Prof. Rolf Drechsler has authored and edited numerous books for Springer
<P>The size of technically producible integrated circuits increases continuously. But the ability to design and verify these circuits does not keep up with this development. Therefore today’s design flow has to be improved to achieve a higher productivity. In <EM>Robustness and Usability in Modern Design Flows</EM> the current design methodology and verification methodology are analyzed, a number of deficiencies are identified and solutions suggested. Improvements in the methodology as well as in the underlying algorithms are proposed. </P>
<P>An in-depth presentation of preliminary concepts makes the book self-contained. Based on this foundation major design problems are targeted. In particular, a complete tool flow for Synthesis for Testability of SystemC descriptions is presented. The resulting circuits are completely testable and test pattern generation in polynomial time is possible. Verification issues are covered in even more detail. A whole new paradigm for formal design verification is suggested. This is based upon design understanding, the automatic generation of properties and powerful tool support for debugging failures. All these new techniques are empirically evaluated and experimental results are provided. </P>
<P>As a result, an enhanced design flow is created that provides more automation (i.e. better usability) and reduces the probability of introducing conceptual errors (i.e. higher robustness).</P>
<P>An in-depth presentation of preliminary concepts makes the book self-contained. Based on this foundation major design problems are targeted. In particular, a complete tool flow for Synthesis for Testability of SystemC descriptions is presented. The resulting circuits are completely testable and test pattern generation in polynomial time is possible. Verification issues are covered in even more detail. A whole new paradigm for formal design verification is suggested. This is based upon design understanding, the automatic generation of properties and powerful tool support for debugging failures. All these new techniques are empirically evaluated and experimental results are provided. </P>
<P>As a result, an enhanced design flow is created that provides more automation (i.e. better usability) and reduces the probability of introducing conceptual errors (i.e. higher robustness).</P>
More automation for time consuming tasks Powerful tools by exploiting formal techniques Visionary approach for formal design verification Debugging at the source level becomes easy Robustness against error prone manual interventions
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